Manycore Processor Education Platform with FPGA for Undergraduate Level Computer Architecture Class

Manycore processor architectures are currently very widely used in almost all computer systems. Furthermore, many computer science department have started to teach parallel programming on manycore system platforms. To best understand the parallel programming on those manycore processors, the classes on manycore processor architecture also have to be provided. However, most current undergraduate computer architecture classes have not yet provided. In this paper, we have design a manycore processor design using a conventional MIPS processor design that is considered as a standard processor architecture model in a traditional undergraduate computer architecture class. Synthesize manycore processor models are developed in 850 lines of Verilog-HDL together with simple parallel applications so students can understand the entire manycore processor design and can learn the basics of the manycore system including underlying communication architecture.